Edge Rewrite
// HTMLRewriter · presentation

This page was redesigned at the edge.

Cloudflare fetched the original article and streamed it through HTMLRewriter to apply an entirely new visual system without rebuilding the source page.

Jump to content

ARM Cortex-A720

From Wikipedia, the free encyclopedia
ARM Cortex-A720
General information
Launched2023
Designed byARM Ltd.
Cache
L1 cache64/128 KiB
(32/64 KiB I-cache with parity,
32/64 KiB D-cache) per core
L2 cache128–512 KiB per core
L3 cache512 KiB – 32 MiB (optional)
Architecture and classification
MicroarchitectureARM Cortex-A720
Instruction setARMv9.2-A
Products, models, variants
Product code name
  • "Hunter"
Variant
History
PredecessorARM Cortex-A715
SuccessorARM Cortex-A725

The ARM Cortex-A720 is a CPU core model from Arm[1][2] unveiled in 2023.[3] It serves as a successor to the ARM Cortex-A715.[4]

Cortex-A700 CPU cores series focus on balanced performance and efficiency, and the CPU core can be paired with other cores in its family such as the high performance ARM Cortex-X4 or/and high efficiency ARM Cortex-A520[5] in a CPU cluster. It can be used as either "big" or "LITTLE".[6]

Architecture changes in comparison with ARM Cortex-A715

[edit]
  • Update to ARMv9.2
  • 15% peak performance improvement over the Cortex-A715
  • Can down to same size as Cortex-A78 with 10% performance improvement
  • Area optimize configuration for no area cost vs Cortex-A78
  • Down L2 cache hit latency to 9 cycles (from 10 cycles)
  • Down mispredict latency to 11 cycles (from 12 cycles)[6]
  • x2 L2 bandwidth
  • DSU-120
    • Up to 14 cores (up from 12 cores)
    • Up to 32 MiB of shared L3 cache (increased from 16 MiB)

Architecture comparison

[edit]
"big" core
μArch Cortex-A77 Cortex-A78 Cortex-A710 Cortex-A715 Cortex-A720 Cortex-A725
Codename Deimos Hercules Matterhorn Makalu Hunter Chaberton
Peak clock speed 2.6 GHz ~3.0 GHz -
Architecture ARMv8.2-A ARMv9.0-A ARMv9.2-A
AArch - 32-bit and 64-bit 64-bit
Max In-flight 160 160 ? 192+[7] - -
L0 (Mops entries) - 1536[8] 0[9] -
L1 (I + D) (KiB) 64 + 64 KiB 32/64 + 32/64 KiB 64 + 64 KiB
L2 Cache (KiB) 256–512 KiB 128–512 KiB 128 KiB–1 MiB[10][11]
L3 Cache (MiB) 0–4 MiB 0–8 MiB 0–16 MiB 0–32 MiB[12]
Decode width 4-way 5-way
Dispatch 6 Mops/cycle 5 Mops/cycle[13] ? -

Usage

[edit]

See also

[edit]

References

[edit]
  1. "Cortex-A720". developer.arm.com. Retrieved 2023-09-16.
  2. "TCS23: The complete platform for consumer computing - Arm Community blogs". community.arm.com. 2023-05-29. Retrieved 2023-09-16.
  3. "Arm Total Compute Solution 2023 targets premium smartphones". Embedded.com. 2023-06-02. Retrieved 2024-01-17.
  4. "Arm Introduces A New Big Core, The Cortex-A720". WikiChip Fuse. 2023-05-28. Retrieved 2023-06-06.
  5. "New Arm Cortex-A720 and Cortex-A520 CPUs launched - Arm Community blogs". community.arm.com. 2023-05-29. Retrieved 2023-09-16.
  6. 1 2 "Arm Unveils 2023 Mobile CPU Core Designs: Cortex-X4, A720, and A520 - the ARMv9.2 Family". www.anandtech.com. Archived from the original on May 29, 2023. Retrieved 2023-06-06.
  7. "Arm Introduces The Cortex-A715". WikiChip Fuse. 2022-06-28. Retrieved 2023-09-16.
  8. "Arm's New Cortex-A78 and Cortex-X1 Microarchitectures: An Efficiency and Performance Divergence". www.anandtech.com. Archived from the original on May 26, 2020. Retrieved 2023-06-06.
  9. "Documentation – Arm Developer". developer.arm.com. Retrieved 2023-06-06.
  10. "Arm launches next gen big core Cortex-A725". WikiChip Fuse. 2024-05-29.
  11. https://www.arm.com/products/silicon-ip-cpu/cortex-a/cortex-a725
  12. "Arm introduces a new big core Cortex-A720". WikiChip Fuse. 2023-05-28.
  13. "Arm Cortex-X2, A710, and A510 deep dive: New Armv9 CPU designs explained". Android Authority. 2021-05-25. Retrieved 2023-06-06.