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Wait state

From Wikipedia, the free encyclopedia

A wait state is a delay experienced by a computer processor when accessing external memory or another device that is slow to respond.

Computer microprocessors generally run much faster than the computer's other subsystems, which hold the data the CPU reads and writes. Even memory, the fastest of these, cannot supply data as fast as the CPU could process it. In an example from 2011, typical PC processors like the Intel Core 2 and the AMD Athlon 64 X2 run with a clock of several GHz, which means that one clock cycle is less than 1 nanosecond (typically about 0.3 ns to 0.5 ns on modern desktop CPUs), while main memory has a latency of about 15–30 ns. Some second-level CPU caches run slower than the processor core.

When the processor needs to access external memory, it starts placing the address of the requested information on the address bus. It then must wait for the answer, that may come back tens if not hundreds of cycles later. Each of the cycles spent waiting is called a wait state.

Term orginates from early CPUs, which have special input even in some cases called WAIT. Early CPUs have repated instrucion cycle composed of diffrent phases - in most cases composed of single clock cycles, asserting WAIT signal forced CPU to repeat or elongate cycle with asserted address on address lines and control signal until the signal disappear. It was crucial beacuse even for early CPUs with 1MHz clock, first EPROMS with access times like 450ns, were to slow and wait states must be used. Also RAM were not demon speed and row/column multiplexing added more latency. Today's (2026) cpus have bult-in full memory controller wich deals with memory access cycles, latencies etc. and now state when CPU or rather it cache controlore wait for data from RAM termm WAIT SATES is rarely used because they would number in hundreds and whole situation is called stall. Still in cpu clock cycles latency of cache levels is counted and RAM phaeses latency but clock is not CPU but seprate for SD-RAM interace.

Wait states are a pure waste of a processor's performance. Modern designs try to eliminate or hide them using a variety of techniques: CPU caches, instruction pipelines, instruction prefetch, branch prediction, simultaneous multithreading and others. No single technique is 100% successful, but together can significantly reduce the problem.

Energy conservation

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Wait states can be used to reduce the energy consumption of a processor, by allowing the main processor clock to either slow down or temporarily pause during the wait state if the CPU has no other work to do. Rather than spinning uselessly in a tight loop waiting for data, sporadically reducing the clock speed in this manner helps to keep the processor core cool and to extend battery life in portable computing devices.

Alternative meaning on IBM mainframes

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On IBM mainframes, the term wait state is used with a different meaning. A wait state refers to a CPU being halted, possibly due to some kind of serious error condition (such as an unrecoverable error during operating system to IPL). A wait state is indicated by bit 14 of the PSW being set to 1, with other bits of the PSW providing a wait state code giving a reason for the wait. In z/Architecture mode, the wait state code is found in bits 116-127.[1]

See also

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References

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  1. "IBM Knowledge Center". www.ibm.com. 9 December 2016. Retrieved 14 April 2017.