Talk:SWAR

SWAR architectures

The section about SWAR architectures reads funny to me, as very few SIMD instruction sets are non-SWAR by this definition. MMX defines its own extended-length registers (64-bit MM) and operations on them. Same for SSE (128-bit XMM), AVX (256-bit YMM), and AVX-512 (512-bit ZMM). For non-x86 AltiVec and NEON are basically the same story. Is this kind of distinction even meaningful? Artoria2e5 🌉 05:23, 13 July 2025 (UTC)

on second thought it is definitely meaningful. it just need to be modified to note that SWAR is basically what every consumer device uses for their approach to SIMD. Artoria2e5 🌉 07:57, 13 July 2025 (UTC)

I know, right? :) it's like... hang on a minute, I thought SIMD was like this really complex concept, absolutely necessary to have some amazing complex design of processor, and the answer is, welll... no! it's only when you look at e.g. the ILLIAC IV and other array Processors, you see multiple scalar processors synchronized and managed to give what you'd really think SIMD ought to be. in Libre-SOC I designed an entire ALU where dynamically at runtime you could open up SWAR 'partitions', I put together literally every standard ALU integer operation (comparison as well) and Jacob then put together a multiplier (all dynamic SWAR so you could do 8x8 in the first byte and 24x24 in the next 3, etc etc. add is a good example, the partition bits act like an "absorber" of carry-over between partitions. https://libre-soc.org/3d_gpu/architecture/dynamic_simd/add/ Lkcl (talk) 19:00, 26 July 2025 (UTC)

SPARC VIS: 1991. in the UltraSPARC pizza box :) https://en.m.wikipedia.org/wiki/Visual_Instruction_Set Lkcl (talk) 05:19, 27 July 2025 (UTC)

and Power ISA VSX. and z13 z-Architecture. and MIPS-3D-ASE. and every commercial GPU's ALU. and dozens more. Lkcl (talk) 19:03, 26 July 2025 (UTC)

z13 z-Architecture z/Architecture is an ISA, the IBM z13 is one of several microprocessors that implement that ISA; it might be the microprocessor that first implemented the SWAR instructions to which you're referring, but subsequent ones, up to the Telum II (currently the latest z/Architecture processor), also implement them. (Well, the microprocessor and the millicode and the "i390" code running on that microprocessor implement it.) Guy Harris (talk) 22:17, 26 July 2025 (UTC)

you see multiple scalar processors synchronized and managed to give what you'd really think SIMD ought to be Depending on who the "you" in question is. As far as I'm concerned, the purpose of SIMD in the general sense is to get as much work done possible per clock tick; for some types of work, a unit of work may be on a sub-register-sized chunk of data, in which case SWAR does the job, while, in other types, a unit of the work may be on a full-register-sized chunk of data, in which case SWAR doesn't help. Guy Harris (talk) 22:17, 26 July 2025 (UTC)

that IEEE article in the abstract uses the phrase "sub-word", yeah you hit the issue, if there are two processors doing e.g. video decode, one of them does image processing 8x slower because it uses 64-bit scalar to do what can be done in 8x 8-bit MMX/SSE clock-for-clock... Lkcl (talk) 05:16, 27 July 2025 (UTC)

i'd be intrigued to know if z/Arch was the first, there are some other ones listed here https://ieeexplore.ieee.org/document/10814825 SPARC (VIS), MIPS (MDMX) Lkcl (talk) 05:12, 27 July 2025 (UTC)

MIPS MDMX Lkcl (talk) 05:20, 27 July 2025 (UTC)

w00t! Lincoln Labs TX2 https://www.engr.colostate.edu/~sudeep/wp-content/uploads/CD7.14-P374493.pdf "Many recent architectures have laid claim to being the fi rst to offer multimedia extensions, in which a set of new instructions takes advantage of a single wide ALU that can be partitioned so that it will act as several narrower ALUs operating in parallel. It’s unlikely that any appeared before 1957, however, when the Lincoln Lab’s TX-2 computer offered instructions that operated on the ALU as either one 36-bit operation, two 18-bit operations, or four 9-bit oper ations. Ivan Sutherland, considered the Father of Computer Graphics, built his historic Sketchpad system on the TX-2. Sketchpad did in fact take advantage of these SIMD instructions, despite TX-2 appearing before invention of the term SIMD." Lkcl (talk) 05:25, 27 July 2025 (UTC)