OpenROAD Project
 | This article may rely excessively on sources too closely associated with the subject, potentially preventing it from being verifiable and neutral. (June 2025) |
| OpenROAD Project | |
|---|---|
| Type of project | Open-source electronic design automation project |
| Products | OpenROAD |
| Owner | OpenROAD Initiative |
| Key people | Andrew B. Kahng[1] |
| Established | June 2018 |
| Funding | DARPA — $17.2 million (2018–2023)[2] NSF — $1,413,555 (2025–2027)[3] |
| Status | Active |
| Website | openroad GitHub repository |
The OpenROAD Project (Open Realization of Autonomous Design) is an open-source project that aims to provide a fully automated, end-to-end digital integrated circuit design flow (RTL-to-GDSII), thereby eliminating the need for human intervention. The project, led by UC San Diego, aims to democratize hardware design and promote rapid innovation in integrated circuit (IC) design by reducing barriers related to cost, time, and experience.
OpenROAD was started in 2018 to address the high cost, needed experience, and unpredictability of conventional EDA tools as part of DARPA's IDEA[4] initiative. Its goal is to establish a 24-hour, no-human-in-loop (NHIL) flow that matches the usual quality of design, and produces layouts directly suitable for manufacturing. OpenROAD is released under a permissive BSD license to keep it freely available, despite the inclusion of commercial tools.
Among OpenROAD's main features are scripting interfaces (Tcl/Python) and a common database (OpenDB), which help designers automate or personalize every phase of the digital design process. Projects using the flow range from Hammer[5] at the University of California, Berkeley, to the FASoC analog/mixed-signal flow[6] to the Zero-ASIC Silicon Compiler.[7] Readymade open ASIC flows include OpenLane and OpenROAD scripts.[8][9]
History and motivation
[edit]Modern digital integrated circuit design is a complex, multi-stage process that requires specialized, expensive, and proprietary tools along with expertise in tuning their parameters. DARPA's IDEA program[4] under Andreas Olofsson initiated OpenROAD, an autonomous, open-source RTL-to-GDSII flow designed to address the "design cost crisis" by eliminating the need for expert tinkering and licensing, thereby democratizing chip design and enabling smaller companies, research groups, and academic institutions to produce semiconductor layouts. The aim was to create a no-human-in-loop flow that could take an RTL description and generate a GDSII mask-ready layout in under 24 hours, with performance, power, and area (PPA) equivalent to commercial design processes.[8]
OpenROAD was led by UC San Diego professor Andrew Kahng. It is supported by commercial partners Arm, Qualcomm, SkyWater, and others. The first iteration (v1.0, 2020) of a current FinFET technology (GF12LP, ~12 nm) produced a complete, integrated flow producing DRC-clean layouts. Along with an almost complete technology-node enhancement in PPA, Version 2.0 (2021) includes advanced capabilities (RC extraction, chip-package co-design). Hundreds of designs on the open SkyWater 130 nm PDK (complete with a Google MPW shuttle) and experimental runs on Intel 22 nm FinFET in 2021 have helped the community improve the flow over time. Forming the foundation of the OpenLane and ChipIgnite projects, the open-source ecosystem for RISC-V System-on-Chip (SoC) designs has expanded rapidly and is now considered the leading open-source physical design infrastructure for digital integrated circuits. Through university courses and events such as the 7 nm OpenROAD Design Challenge, which aim to increase the user base, the initiative aggressively promotes worker education and training.[10][11][9][12]
See also
[edit]References
[edit]- ↑ "Andrew B. Kahng". Jacobs School of Engineering. University of California, San Diego. Retrieved 2026-09-19.
- ↑ "Open-source Semiconductor Chip Design Tool Celebrates Success". UC San Diego Today. University of California, San Diego. 2024-10-16. Retrieved 2026-09-19.
- ↑ "POSE: Phase II: Growing a Collaborative Ecosystem for Open-Source Chip Design Using OpenROAD". National Science Foundation. National Science Foundation. Retrieved 2026-09-19.
- 1 2 "Intelligent Design of Electronic Assets". www.darpa.mil.
- ↑ "HAMMER: A Platform For Agile Physical Design | EECS at UC Berkeley". www2.eecs.berkeley.edu.
- ↑ "FASoC: Fully-Autonomous SoC Synthesis using Customizable Cell-Based Synthesizable Analog Circuits – Home for FASoC: Fully-Autonomous SoC Synthesis using Customizable Cell-Based Synthesizable Analog Circuits".
- ↑ "SiliconCompiler". www.zeroasic.com.
- 1 2 "Welcome to OpenROAD's documentation! — OpenROAD documentation". openroad.readthedocs.io.
- 1 2 "The-OpenROAD-Project/OpenROAD". June 19, 2025 – via GitHub.
- ↑ "vlsicad.ucsd.edu" (PDF).
- ↑ "MPW designs in OpenROAD CI improve quality for everyone – The OpenROAD Project". theopenroadproject.org.
- ↑ "The OpenROAD Project – Foundations and Realization of Open and Accessible Design". theopenroadproject.org.