GA144
 Node array and pinout | |
| General information | |
|---|---|
| Launched | 2011 |
| Designed by | Charles H. Moore |
| Common manufacturer | |
| Physical specifications | |
| Cores |
|
| Package |
|
| Architecture and classification | |
| Instruction set | 18-bit stack machine |
The GA144 is an asynchronous, 144-core microprocessor designed by Charles H. Moore, developed and sold by GreenArrays. It is a spatial processor: its 144 independent 18-bit, stack-based F18A computers are arranged in an 18-by-8 array and communicate with adjacent nodes rather than through a shared memory. The device was sold as the GA144-1.2 / G144A12 and was announced for sale by GreenArrays in October 2011.[1]
Architecture
[edit]Each F18A node has local RAM and ROM and executes independently, without a global clock or shared memory. The nodes use blocking reads and writes to communicate with neighbouring nodes; consequently, programs that span distant nodes must explicitly route messages and avoid deadlock.
The F18A is an 18-bit stack architecture. A node has 64 words each of RAM and ROM; its small local memories and stacks require programs and data to be divided among nodes for larger tasks.[2] GreenArrays supplied arrayForth, a Forth-based development environment, for creating code for the nodes.[3]
Input and output
[edit]Twenty-two edge nodes have one or more external pins. The interfaces include general-purpose digital I/O, five analogue input/output pairs, two 18-bit parallel interfaces, SPI, serial boot interfaces, and two serializer/deserializer interfaces.[4] The chip is supplied in an 88-pin QFN package.
Performance and power
[edit]GreenArrays specified a peak aggregate rate of 96 billion operations per second and a power range of 14 microwatts to 650 milliwatts, dependent on activity. Because the device is asynchronous, its timing and energy use vary with node activity, supply voltage, temperature, and the instruction mix.[5]
Research use
[edit]At the University of California, Berkeley, Phitchaya Phothilimthana developed Chlorophyll, a synthesis-aided programming model and compiler for the GA144.[6] Researchers at Ruhr University Bochum implemented AES and RSA on the GA144 and evaluated the AES implementation's resistance to power-analysis attacks.[7]
See also
[edit]References
[edit]- ↑ "News". GreenArrays. 4 October 2011. Retrieved 17 September 2026.
- ↑ Back, Andrew (16 July 2012). "Hands on with a 144 core processor". DesignSpark. Retrieved 17 September 2026.
- ↑ "EVB001 Evaluation Board for G144A12" (PDF). GreenArrays. pp. 5–6. Retrieved 17 September 2026.
- ↑ "GA144-1.10 product brief" (PDF). GreenArrays. Retrieved 17 September 2026.
- ↑ "G144A12 Chip Reference Data Book" (PDF). GreenArrays. 5 July 2011. Retrieved 17 September 2026.
- ↑ Phothilimthana, Phitchaya Mangpo (15 May 2015). Chlorophyll: Synthesis-Aided Compiler for Low-Power Spatial Architectures (Master's report). University of California, Berkeley. pp. 2–4. Retrieved 17 September 2026.
- ↑ Schneider, Tobias; von Maurich, Ingo; Güneysu, Tim; Oswald, David (October 2014). "Cryptographic Algorithms on the GA144 Asynchronous Multi-Core Processor: Implementation and Side-Channel Analysis". Journal of Signal Processing Systems. 77 (1–2): 151–167. doi:10.1007/s11265-014-0872-5. Retrieved 17 September 2026.