Draft:SCIOPTA
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SCIOPTA
[edit]| SCIOPTA | |
|---|---|
| Developer | SCIOPTA Systems GmbH |
| OS family | Real-time operating systems |
| Working state | Current |
| Source model | Closed source |
| Latest release | 2.9.7 |
| Marketing target | Safety-critical, embedded |
| Supported platforms | ARM (Cortex-M, Cortex-A, Cortex-R), ARM64, Infineon AURIX, Renesas RX, Analog Devices Blackfin, Power architecture |
| Kernel type | Real-time kernel |
| License | Proprietary |
| Official website | sciopta |
SCIOPTA is a real-time operating system (RTOS) for hard real-time and safety-critical embedded applications, developed by SCIOPTA Systems.[1][2]
SCIOPTA is a fully pre-emptive RTOS with a message-based architecture and direct message passing between processes. It is designed for embedded systems requiring deterministic real-time operation and is available in safety-certified configurations.[1][2]
History
[edit]SCIOPTA Systems was founded as Litronic AG in 1988 in Bottmingen, Switzerland. STMicroelectronics describes the company as specializing in real-time systems and developing, selling, supporting and maintaining system software for safety-critical embedded applications.[2]
SCIOPTA has been supported by a number of semiconductor and embedded-development companies. AMD lists Sciopta RTOS among the RTOS products in its embedded software ecosystem.[3]
Third-party development tools also provide dedicated support for SCIOPTA. Lauterbach provides TRACE32 RTOS debugging support for SCIOPTA, while iSYSTEM provides operating-system awareness for SCIOPTA in its winIDEA development environment.[4][5]
Architecture
[edit]SCIOPTA uses a message-based architecture for interprocess communication. Processes communicate by exchanging messages, and the system provides modules for structuring groups of processes and other kernel objects.[1][6]
The SCIOPTA documentation describes three kernel technologies: V1, V2 and V2INT. V1 kernels are implemented in assembler and are tuned for ARM architectures. V2 kernels are primarily implemented in C and are available for multiple processor architectures. V2INT kernels provide additional integrity features for use in safety-certified systems.[1]
The kernel provides pre-emptive multitasking and prioritized scheduling. SCIOPTA also supports systems using memory management units (MMUs) and memory protection units (MPUs).[1]
Message passing
[edit]Direct message passing is a central part of the SCIOPTA architecture. Messages are used for communication between processes, while the kernel manages message ownership and delivery.[1][6]
Independent descriptions of SCIOPTA also identify its message-based architecture and direct message passing as characteristics of the operating system.[7]
Functional safety
[edit]SCIOPTA is available in safety-certified configurations for use in safety-critical systems. The SCIOPTA Kernel Manual states that its V1, V2 and V2INT kernel technologies have been certified by TÜV SÜD Munich according to several functional-safety standards.[1]
- IEC 61508 — Safety Integrity Level 3 (SIL 3)
- ISO 26262 — Automotive Safety Integrity Level D (ASIL D)
- EN 50128 — SIL 3/4
- EN 50716 — SIL 4
The TÜV SÜD certificate database identifies a SCIOPTA certification under certificate number Z10 069812 0011 Rev. 01.[8]
STMicroelectronics independently describes SCIOPTA as a message-based RTOS with built-in safety functions and states that it has been certified by TÜV according to IEC 61508, EN 50128 and ISO 26262.[2]
NXP has also described SCIOPTA as a message-based RTOS with built-in safety functions and identified IEC 61508 SIL 3 certification in its functional-safety material.[9]
Cybersecurity
[edit]SCIOPTA Systems has developed security and compliance documentation addressing cybersecurity requirements applicable to products with digital elements, including the Cyber Resilience Act (CRA), Regulation (EU) 2024/2847.
The company's CRA-related documentation addresses cybersecurity processes including vulnerability handling, software-component management and the maintenance of a software bill of materials (SBOM). Security planning documentation is maintained separately from the functional-safety documentation.
The cybersecurity work is distinct from SCIOPTA's functional-safety certification. Functional-safety standards such as IEC 61508 and ISO 26262 address safety-related risks, whereas the CRA establishes cybersecurity requirements for products with digital elements.
The European Union Agency for Cybersecurity (ENISA) operates a Single Reporting Platform for cybersecurity vulnerability and incident reporting under the CRA.[10]
Supported platforms
[edit]The SCIOPTA Kernel Manual lists support for multiple processor architectures, including Arm, Renesas RX, Power Architecture, Analog Devices Blackfin and Infineon AURIX.[1]
Supported processor families include:
- ARM, including Cortex-M, Cortex-A and Cortex-R
- ARM64
- Infineon AURIX
- Renesas RX
- Analog Devices Blackfin
- Power architecture
Third-party development tools provide SCIOPTA-specific support. Lauterbach provides dedicated TRACE32 support for SCIOPTA, while iSYSTEM provides SCIOPTA-specific operating-system awareness and debugging features in winIDEA.[4][5]
See also
[edit]References
[edit]- 1 2 3 4 5 6 7 8 "SCIOPTA Kernel Manual" (PDF). SCIOPTA.
- 1 2 3 4 "SCIOPTA Systems". STMicroelectronics.
- ↑ "Embedded Software". AMD.
- 1 2 "TRACE32 RTOS Debugger for SCIOPTA". Lauterbach.
- 1 2 "SCIOPTA". iSYSTEM.
- 1 2 "Real-time OS and Hypervisor". ERTIS.
- ↑ "SCIOPTA Safety RTOS". Indes.
- ↑ "TÜV SÜD Certificate Database". TÜV SÜD.
- ↑ "Functional Safety" (PDF). NXP.
- ↑ "Single Reporting Platform (SRP)". European Union Agency for Cybersecurity.