Edge Rewrite
// HTMLRewriter · presentation

This page was redesigned at the edge.

Cloudflare fetched the original article and streamed it through HTMLRewriter to apply an entirely new visual system without rebuilding the source page.

// request.cf · coarse context

A page that knows where it met you.

Only coarse request metadata is shown. This demo does not display or persist visitor IP addresses.

Country
US
Cloudflare location
CMH
Connection
HTTP/2
Language
Not provided

Ray ID: a22a8dae8e6e376a

Jump to content

Talk:SuperH

Page contents not supported in other languages.
Add topic
From Wikipedia, the free encyclopedia
Latest comment: 28 days ago by A Shortfall Of Gravitas in topic J-core

J-core

[edit]

I've added an "importance section" cleanup tag to the entire thing, despite it being a briefly interesting project because:

  • Primarily, from the j-core.org page the project is dead (last News from August 2016 and not exactly news on anything development-wise) and the source inaccessible (except on archive.org). There was supposed to be a kickstarter for a development board (which was only going to be pre-flashed FPGAs, not a real processor) but it never materialized; since kickstarters in 2016 were basically free money whether you ever shipped something or not it's pretty bad if you can't even manage to start one.
  • If the project wasn't (apparently) abandoned, it would probably only warrant a sentence or two mentioning it. The majority of the section goes into needless detail about ISA support... it would be expected that any implementation of a processor claiming a certain generation is ISA compatible with that generation of the OEM processor it's copying. Otherwise it kinda isn't an implementation, or it's just its own thing kinda based on the SuperH. The detail in this area continues with things like compiler / assembler / OS support which are implied by being an implementation of the processor. If existing compilers generate code that the thing won't run, it's broken or incomplete. If an OS can't run on it and it's meant to be a full implementation, it's broken or incomplete. That's all there is to it. Again on the detail level, a VHDL implementation implies that FPGA / ASIC / CPU can be generated. The language only exists to define hardware. Of course a bunch of the code (I'm not sure if it's part of the VHDL compiler or not, you wouldn't normally include that in a source tree but who knows) appears to be Clojure. Remove all that and you basically have nothing except a couple of dates and presentations, because there's nothing using it that I can find and no product.
  • I already removed this since it wasn't cited, but claiming an ASIC costs 3 cents is insane... maybe you'll get that price if you're ordering a few hundred million of them and also happened to have saved the life of the CEO and family of the company making them and they have a bunch of downtime. Otherwise that's probably less than the silicon is worth, nevermind the cost of the masks to etch the thing which are the extremely expensive part, and the chemicals needed to do the etching, etc.

A Shortfall Of Gravitas (talk) 15:02, 30 June 2026 (UTC)Reply