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Talk:MOS Technology 6502

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Latest comment: 2 months ago by RastaKins in topic B flag section incorrect or confusingly worded

74158

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"Peddle suggested that anyone that actually required this style of access could implement it with a single 74158." I don't see how that would work with just one, the 74158 is a quad 2-input mux, the bus is 16 bit. The source doesn't say "single" either, just "a". Someone with better knowledge of the topic, please fix Aecho6Ee (talk) 08:04, 12 November 2023 (UTC)Reply

Yes it looks like you need four of them. More usual would be tristate buffers like the 74367, but the MUX are fine, too. Many of the early chips, and I didn't look up this one, could barely drive one TTL gate. Gah4 (talk) 21:05, 12 November 2023 (UTC)Reply

Reset Pin 40

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It seems that the Reset Pin in the pin configuration picture is wrong. It should be inverted. That means a Dash should be drawn over it, similar to the NMI and IRQ pin. WhyLee (talk) 09:19, 30 April 2025 (UTC)Reply

@WhyLee: Thanks, you are correct. The problem needs to be fixed at commons:File:MOS6502.svg. The diagram appears in the article at MOS Technology 6502#Technical description. I would not be able to look at fixing a diagram for a month. Someone at WP:HELPDESK would be able to recommend how to ask someone to fix it. Johnuniq (talk) 10:07, 30 April 2025 (UTC)Reply
@WhyLee: Or WP:BEBOLD and update the picture yourself. You'll discover/learn along the way. RastaKins (talk) 20:41, 30 April 2025 (UTC)Reply

Furby

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In the Furby article, in the technology section the original model's use of the 6502 is mentioned. Could that be brought into this article? Anamyd (talk) 16:48, 1 May 2025 (UTC)Reply

It appears that the original Furby did not use a 6502. It used a Sunplus SPC81A. This microcontroller has a huge 80K of ROM and 128 bytes of RAM. Although the architecture of the SPC81A is similar to a 6502, it is missing the Y register. The Furby source code is readily available on the internet. It seems like a beginner wrote it. (RAM is allocated with equates and most of the code is loads, stores, and jumps.) RastaKins (talk) 15:38, 2 May 2025 (UTC)Reply

Conception section needs a rewrite

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What is this suggestion that the history of 6502 somehow goes back to 1960? The whole paragraph is too farfetched, and does not really have anything to do with 6502. Some of it related to the personal history with Peddle, but that is about Peddle and not about 6502. The section needs to be rewritten or removed. ~2026-81565-2 (talk) 04:55, 6 February 2026 (UTC)Reply

I think the conception section needs a delete. This whole fanciful section was written by a single editor and started with this edit:
18:48, March 5, 2025 Chadalvarez2021 119,718 bytes +1,228 →History and use: Attempting to find further origins about the 6502 and what led Chuck to begin designing new technology of the time (I'll let you now when I'm done)
If anything, it should be in the Peddle article but I am not sure the cites are adequate for that. RastaKins (talk) 16:13, 6 February 2026 (UTC)Reply
I have been bold and trimmed out some of the stuff less relevant to the 6502 specifically. --Wtshymanski (talk) 19:42, 10 February 2026 (UTC)Reply

B flag section incorrect or confusingly worded

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At the time of writing this, the article reads, "If an instruction other than the BRK instruction pushes the B flag onto the stack as part of the processor status the B flag always has the value one." But according to the source 6502 BRK and B bit https://web.archive.org/web/20210405071302/http://visual6502.org/wiki/index.php?title=6502_BRK_and_B_bit IRQ and NMI push the B flag as 0, while BRK and PHP push it as 1. Also, earlier in the article it says, "The BRK instruction then pushes the processor status onto the stack, with the B flag bit set to zero. At the end of its execution the BRK instruction resets the B flag's value to one. This is the only way the B flag can be modified." This seems to imply that the B flag is an actual processer flag like the carry or overflow flag, but according to https://www.nesdev.org/wiki/Status_flags, it is not, as

"While there are only six flags in the processor status register within the CPU, the value pushed to the stack contains additional state in bit 4 called the B flag that can be useful to software. The value of B depends on what caused the flags to be pushed. Note that this flag does not represent a register that can hold a value, but rather a transient signal in the CPU controlling whether it was processing an interrupt when the flags were pushed." ~2026-27554-57 (talk) 02:58, 7 May 2026 (UTC)Reply
This posting also agrees that BRK pushes a 1 in bit 4 and further gives a code snippet showing how this may be used. It appears B exists so that BRK and IRQ can use the same vector. RastaKins (talk) 14:44, 7 May 2026 (UTC)Reply