// Workers AI · dad joke modeWhat did Delta delay say to its friend? "You're always late.

In VHDL simulations, all assignments to signals (a VHDL concept that represents a net connecting different components together) occur with some infinitesimal delay, known as delta delay, unless a delay is specified. Technically, delta delay is of no measurable unit, but from a digital electronics hardware design perspective one should think of delta delay as being the smallest time unit one could measure, such as a femtosecond (fs).